26Jul 2017

AN IN-SITU TIMING-ERROR PREDICTION AND PREVENTION TECHNIQUE FOR VARIATION-TOLERANT MAC-UNIT.

  • Electrical Engineering Department, N.I.T. Kurukshetra, India.
  • IIT-Delhi, New Delhi.
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In this paper, a CANARY based Dynamic Voltage Scaling (DVS) technique is applied on a 17-bit Multiplier Accumulator (MAC) Unit in 0.55- nm technology to critically analyze the voltage safety margins and energy efficiency during the worst case of Process, Voltage and Temperature (PVT) conditions. The CANARY based DVS technique incorporates an inherent in situ error prediction feature, with a mechanism to prevent the errors to impact the Design under Test (DUT). In CANARY based DVS technique, the supply voltage is reduced automatically. Error prediction and prevention mechanism ensures correct operation and lesser voltage supply. Supply voltage is intentionally scaled down till the first failure point of MAC unit to reach at an optimal tradeoff [17] between voltage supply and energy consumption. It is observed from the simulation results that the energy savings up to 38.5% is achieved with CANARY based adaptive DVS as compared to classical DVS technique over the wide spectrum of functional frequency range. The SPICE platform is used for the detailed analysis and step by step implementation of CANARY based DVS technique.

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[Jasmer Singh, Saha K and GL Pahuja. (2017); AN IN-SITU TIMING-ERROR PREDICTION AND PREVENTION TECHNIQUE FOR VARIATION-TOLERANT MAC-UNIT. Int. J. of Adv. Res. 5 (Jul). 1772-1781] (ISSN 2320-5407). www.journalijar.com

Jasmer Singh

DOI:

Article DOI: 10.21474/IJAR01/4898      
DOI URL: http://dx.doi.org/10.21474/IJAR01/4898

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