AN EXPERIMENTAL STUDY OF LOW-POWER HIGH-SPEED AND COMPACT TERNARY VLSI CIRCUIT DESIGNS WITH SPECIAL REFERENCE TO CARBON NANOTUBE FIELD EFFECT TRANSISTORS

Submitted by : R.GOPI REDDY
University: SUNRISE UNIVERSITY
E-mail : gopireddyves@gmail.com
Supervisor's Name : Dr. SACHIN SAXENA
Year of award : 2018
Awards : DOCTOR OF PHILOSOPHY IN ECE
Summary of Thesis

p classql-align-justifyCarbon nanotube field effect transistor (CNTFET) demonstrates extraordinary guarantees as extension to Silicon MOSFET for building superior and low power VLSI circuit. Three-esteemed (ternary) rationale is a promising contrasting option to conventional binary rationale for achieving straightforwardness and vitality effectiveness in present day advanced design. Ternary rationale has an exquisite relationship with CNTFET on the grounds that the most ideal approach to design ternary circuit is the multiplethreshold strategy and wanted edge voltage can be effortlessly accomplished by using unique diameter of CNT in CNTFET gadget.pp classql-align-justifyThis po...

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THESIS CHAPTER SCHEME

1.    Introduction

2.    Review of literature

3.    Design of 2-bit Hardware Optimized Ternary ALU (HO-TALU) utilizing CNTFETs

4.    Performance Boosted Designs of Sub-Blocks of 2-bit Hardware Optimized Ternary ALU (HO-TALU) using CNTFETs

5.    Design of 2-bit Power Optimized Ternary ALU (PO-TALU) using CNTFETs

6.    Design of High Speed Content Addressable Memory (CAM) cells using CNTFETs

7.    Conclusion and Future Work


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