18Aug 2020

DESIGN OF A DEMULTIPLEXER USING DOUBLE BASED NUMBER SYSTEM

  • Department of Mathematics, University of Sri Jayewardenepura, Gangodawila, Nugegoda, Sri Lanka.
  • Department of Computer Science, University of Sri Jayewardenepura, Gangodawila, Nugegoda, Sri Lanka.
  • Department of Mathematics, University of Sri Jayewardenepura, Gangodawila, Nugegoda, Sri Lanka.
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This paper presents an innovative method for designing a double based demultiplexer. This demultiplexer is designed using binary number system combined with ternary number system. A binary demultiplexer selects one out of 2^n number of output lines and passes the single input to one out of 2^n number of output lines whereas a ternary demultiplexer selects one out of 3^m number of output lines and passes the single input to one out of 3^m number of output lines. We propose a double based demultiplexer that selects one out of 2^n 〖×3〗^m number of output lines and passes the single input to one out of 2^n 〖×3〗^m number of output lines.


[K.K.W.A.S Kumara, D.D.A Gamini and K.G.H.A Sanjeewa (2020); DESIGN OF A DEMULTIPLEXER USING DOUBLE BASED NUMBER SYSTEM Int. J. of Adv. Res. 8 (Aug). 119-124] (ISSN 2320-5407). www.journalijar.com


K.G.H.A Sanjeewa
1. Department of Mathematics, University of Sri Jayewardenepura,
Sri Lanka

DOI:


Article DOI: 10.21474/IJAR01/11466      
DOI URL: http://dx.doi.org/10.21474/IJAR01/11466