Noise Tolerable Dynamic CMOS Circuit With Current Mirror Keeper Transistor.

Dynamic CMOS circuits are less immune to noise as compare to static CMOS circuits in digital VLSI design. The use of dynamic CMOS circuits reduces the number of transistors, which in turn reduces the number of interconnects, cross talk between interconnect and power dissipation. So noise is the major concern of dynamic CMOS design. The noise susceptible design through simulation and analysis shows that noise resistance of dynamic CMOS logic circuits can be improved as compare to static CMOS logic circuits with the same performance of dynamic circuits the inhibitor?s concentration and decreased with rise of temperature.