Optimal Design of R-2R Ladder Based DAC with Better Performance Parameter in 45nm CMOS Process
- E&TC Department, Sinhgad Academy of Engg, Pune, M.S. India.
- E&TC Department, Sinhgad Academy of Engg, Pune, M.S. India.
- EDA Department , NI2 Designs,Pune, M. S. India
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A/D or D/A converter provides interface between analog world and digital processing system, hence used extensively today. Most of the signal in the nature is analog, so digital to analog converter takes digital input from digital processing system and converts it into analog signal. In VLSI design, number of devices increases in system as complexity increases, hence die size required for system increased. As availability of die size becomes more and more critical, optimization of each function in system is important for area consumption. This paper discusses the development and design of 4 bit R2R based D/A converter using MOS transistors as element defining the accuracy. This paper describes the design of a DAC with average speed, linearity and resolution with minimum power dissipation and low area consumption. Also it provides design of an 4 bit DAC with good accuracy by using Microwind 3.5. For Pre Layout simulation 45 nm CMOS process technology has been used.
[Abhishek N. Shinde, Prof. Seema H, Rajput, Shrikant R. Atkarne (2016); Optimal Design of R-2R Ladder Based DAC with Better Performance Parameter in 45nm CMOS Process Int. J. of Adv. Res. 4 (Jan). 1158-1163] (ISSN 2320-5407). www.journalijar.com