THE HARDWARE-EFFICIENT IMPLEMENTATION OF A RECONFIGURABLE LOW-LATENCY POLAR CODING PROCESSOR FOR 5G SYSTEMS

People often use polar codes, which are error correcting codes, in communication networks. Polar codes are better at fixing mistakes than other codes.This study suggests a VLSI architecture for the Polar decoder. The Maximum- Posteriori (MAP) algorithm is used for interleavers, deinterleavers, and soft-in-soft-out decoders. This study employs two recursive convolutional encoders and a pseudorandom interleaver on the encoder side. We used Verilog HDL to design the system and Xilinx ISE 13.2 to test it. The most traffic on 5G mobile broadband is projected to be 20Gbps. After 5G, data speeds are expected to reach terabits per second. The fastest polar code implementations can send data at 5Gbps. Because of this, Turbo and LDPC codes, which made 3G and 4G systems work, are missing from many new 5G apps. Polar coding is a new thing in 5G. It is a strong candidate for 5G New Radio since it guarantees top performance in 5G situations. This article says that polar codes are good for 5G uses.